Twin 4040s. 128k static RAM. A line buffer, probably in the region of the number 244. Something related to Arduino in a vague fashion.
8 data lines connected to the buffer, and from there onto the RAM chip. The 4040s provide the address generation.
Press a button or otherwise glean a clue about an appropriate time to start sampling from some logic or other. Reset the addressing logic. While ram not full:- increment address, latch data into the buffer and then write it to the RAM. When RAM full, await instructions to download via serial.
Could work, non?
Alternatively there seems to be a little logic analyser war happening right now - I'd back this regime. If you earn in dollars, then it's offering quite good value for money. If you earn in English pounds then you're laughing.
Sorted by Squirrels.
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About Sir Morris
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Licensed under a Creative Commons Attribution-Noncommercial 2.5 Generic License.
The work of others where referenced will be attributed appropriately. If I've failed to do this please let me know.
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