Sorted by Squirrels.

Wednesday, 7 August 2013

Serial #000000000000000001


Thanks to the folks at OSH Park  the first production prototype has been assembled. It's quite one thing to cut the board yourself and quite another to have something so very purple and gold...

As usual, click to embiggen.


With all the handshaking issues worked out I now have a very fast and solid transfer protocol, able to load a 40K program in 300 milliseconds.

Work is now ongoing to develop the utility ROM to enable two virtual disk drives 2: and 3:. Basic support is done but I'd love to be able to boot from an SD drive. Achieving this will be a challenge if I'm to retain 100% support for the various DOS versions available for this fine machine.


Thursday, 20 June 2013

Loading Einstein programs from SD card

Finally it's working!

http://www.youtube.com/watch?v=VA3agKxpm8k

There are still a few issues around some of the timing for handshaking, but I'll apply the logic analyser once I've found a reproducible test case.

Thursday, 13 June 2013

What did _you_ do in your lunch-hour?

As per the previous post - they were out of raspberry and white chocolate muffins, so...

It's amazing what a coat of paint does for a prototype board! This is the result of a careful spraying of Plastikote 'Creme de la creme' - AKA 'Retrocomputer white'. Ignore the bloom in the picture - that's just an artifact of whatever additional compression has been applied to the JPEG. In the flesh, as it were, the board is a gleaming off-white.


And here's the solder side. I can't wait to get stuffing.


If you click to embiggen then you may see the teeny tiny capacitors - 0402s. They'll be the teeniest thing I've ever used.

I treated myself to a fresh etching solution today as I was short of time. This board went from printer to camera in just under an hour. It would have been about half that if there wasn't a 60 way IDC connector and 44 pin CPLD socket on there :D

At least I didn't drill any body parts today.

If you haven't been following (shame on you!) then you have been looking at the second prototype of einSDein - an SD card interface for Tatung Einstein computers.

Today I wrote data from my Einstein to the PIC controller.



The PIC controller is announcing the title, and a small test program on the Einy is writing the ubiquitous string, where it is received and displayed by the PIC.


.module fnMessageToHostW
fnMessageToHostW:
   ld    hl,message-1
   jr    _endtest

_send:
   call  waitByteTaken
   jp    c,reportTimeout
   out   (WRITE),a
   ld    e,a
   push  hl
   DOSCALL(CPM_FUNC_CONSOLE_OUT)
   pop   hl
_endtest:
   inc   hl
   ld    a,(hl)
   and   a
   jr    nz,_send

   ret
.endmodule


The hardware has changed a little since my first stab after finding out to my horror that unless I upgraded the processor to a totally over-the-top type then I wasn't going to be able to use hardware SPI and the parallel master port at the same time. Disaster. Of course I could have used software SPI - like I did in the Acorn Atom version of this board - but that would have been too easy. Instead I chose to stand on the shoulders of a giant and implement the parallel port in the CPLD. My friend Phill had done this for the Dragon and so I've lifted a good portion of his design. Thanks Phill! 

Phill's design has several advantages over the built-in hardware of the PIC. 

1. It's processor agnostic so this design could be used with AVR, ARM, or whatever other chip you have handy.

B. Unlike the PIC the host computer can query the state of the buffers making for a slight increase in speed when polling long operations.

It hasn't been easy, I've spent a couple of days crying into my milk because it wasn't working and I just didn't know why. I added LEDs to make myself feel better. I stripped the implementation back to literally nothing and started again a couple of times. I stared at the code for Einy, PIC and CPLD until I realised my stupid mistake. One part of the design used active low logic, and the other was active high. With that sorted we appear to have lift-off!

Here's some glamour shots. Firstly - the thing in action!


To the left is the Xilinx programmer, to the right is Pickit3. Centre stage is the serial lead, an FTDITTL232. Bet you're really pleased I told you that.


And here she lies, disconnected. Do you like the wiring mess? :D This should sort it out:

Miraculously I've managed to fit this on a single layer which should make things a touch easier.



Next step will be to add the SD card handling to the PIC code. Or making the new board. Or a raspberry and white chocolate muffin. Decisions, decisions.

Sunday, 19 May 2013

It can never be simple

I'd forgotten that I can't run a PIC18F4525 at 3.3V and expect it to work reliably. The minimum recommended volume is 4.2V. I can switch to the low voltage part, but speed decreases with voltage so I'm considering something a little more radical. Brain transplant!



This is a PIC32MX broken out to solder pads. I'll wire it point to point to work out some minimal implementation as I go along porting the code. It pops into the vacated PIC18 socket, hence the strange lop-sided appearance - there are pins on the board that need to be avoided.

This was the 1st chip which I soldered with paste & hot air.

Thursday, 16 May 2013

EinSDein Step 2

Told you I would :D

Now on to the modification of the firmware. I'm going to be using a branch of the AtoMMC firmware which will allow both linear and sector-based access to files. This will allow the use of disk images directly from the FAT filing system.

I haven't decided yet whether to use memory or IO mapped accesses. That's the beauty of using programmable logic.


Saturday, 11 May 2013

EinSDein drei vier!

The board has been very patient waiting for me to have enough time to solder it up. It appears that I have some free time this fine Saturday afternoon so I'm going to heat up the Hakko..!



Wednesday, 17 April 2013

Tatung Einstein SD card interface

No computer left behind - That's my motto! And just to prove it here is the first public outing of the circuit for EinSDein. I just thought of that name, snappy, eh? :D

Click an image to embiggen it.

It's the usual suspects. A Pic18F452x class chip with its wonderful PSP, and a Xilinx XC9500 class CPLD. The whole thing runs at 3.3v so there's no need for any clumsy level conversion when accessing the SD card. The CPLD is 5V tolerant, which is nice.

It will run a modified hybrid firmware from ZXpand and its Acorn Atom progenator - AtoMMC.

Sunday, 14 April 2013

Analyse this!

While debugging AR80 I needed to attach the logic analyser semi-permanently. I came up with a shield stacker which has pin header posts soldered at a jaunty angle.

These are just the usual long-legged sockets with smd-type pin header attached so that the spacer bar rests on the base of the socket part.
This pushes the header pins out at a slight angle, allowing the analyser cable to attach without fouling on the shield itself.

Tuesday, 9 April 2013

AR80 projects source

Here is the google code link for the project sources. There are no detailed instructions for putting it all together right now, but these are being worked on. Of course I'll be happy to help anyone that fancies having a quick go on this.

Sunday, 7 April 2013

AR80

What do you get when you cross an Arduino and a Z80? Well, one of these of course!


I've made a few shields lately and this has to be the meatiest. From L to R we have a venerable Z80. Next to that is a svelte 32KByte RAM. Continuing on we have the ubiquitous reset button and last - but definitely not least - a little CPLD. In this case it's a Xilinx XC9536XL.

The idea came about after some back-and-forth discussion with a friend about making a Z80 based trainer and what would be involved. The theme of AVRs came up and after a brief dalliance with the idea of putting an Arduino on the nascent Z80 board to act as a communication port it naturally flipped over and the concept of the Z80 shield was born.


The Arduino acts as clock source, CPLD programmer, bootstrap ROM and IO handler. The CPLD performs the fairly ordinary task of being a memory and IO controller. It also has a Dirty Little SecretTM.

The more observant may have noticed that the board is a little unusual as there's no ROM. And no, I didn't just forget it. It's not a problem. All you need to be able to do is get program and data into memory. The bootstrapping of the Z80's program therefore needs to be performed using a little hackery. Which is where the CPLD's DLS comes in.

Hold on - I can't keep referring to the CPLD as 'the CPLD'. That wouldn't be fair. When it arrived from the kindly Mr. Farnell's shoppe it was called 'the CPLD'. But once programmed then I'm sure you'll agree it has become something more than the sum of its parts. A custom chip no less. Amiga has Agnes, the 64 has Sid. If I'm to be true to the board then I must insist that from now on we refer to this fine chip as Alan, the name it chose. OK. Continue.

Alan can store and output a byte upon request. The Arduino can write and read this byte, as can the Z80. Aha! It's starting to come together! As Alan controls the Z80's access to memory then it's a simple matter of casually outputting the content of the latch onto the data bus at opportune moments, rather than the content of memory. Just assert a control line so Alan knows when you'd like this behaviour, and you can deliver instructions to the Z80 at your will. Construct your bootloader such that it doesn't need to read RAM or loop and you are, as some might say, golden.

Alan exposes a read-only copy of the Z80's RD line, which can be used to synchronise writes to the latch. The process goes like this:

Assert Z80s RESET line
Assert 'bootload' signal
Pre-warm the latch with the first byte of your bootstrap program
Release Z80s RESET line

Repeat until all bytes of bootstrap written:
  Wait for RD to go low  (z80 is reading an instruction, delivered from the latch)
  Wait for RD to go high  (z80 processing instruction)
  Write the next byte of the bootstrap program to the latch

De-assert 'bootload' signal
Reset Z80

From there you have a program stored in RAM which the Z80 happily executes ad infinitum, or until the PC powers down. Whichever is soonest.

The Z80 can instigate data exchange with the Arduino. This is achieved using IO requests. To avoid critical timing constraints I opted to use a cool feature of the Z80 - the ability to pause processing whilst an IO request completes. Alan notices when an IO request is in progress and asserts the Z80's WAIT line, which puts the processor into suspended animation until such time as the line is cleared. At this point normal service is resumes and processing continues as if nothing had happened. The WAIT line is exposed to the Arduino so it can detect when an IO is under way. Used in conjunction with the RD line it can be used to detect both IO writes (Z80 wants to send data to Arduino) and reads (Z80 wants data from Arduino).

Z80 IO read:
  IN instruction is detected by Alan
  WAIT is asserted
  Arduino detects the request & puts data byte into Alan's latch
  WAIT is released by arduino
  IO instruction completes, data from the latch is taken from the data bus

Z80 IO write:
  OUT instruction is detected by Alan, data from the bus is stored in the latch
  WAIT is asserted
  Arduino detects the request & reads the latch
  WAIT is released by arduino
  IO instruction completes

The project is still in its infancy, but is working to an encouraging level :D


All the materials needed to make one of these for yourself (Eagle files, Verilog code for the CPLD and Arduino sketches) will be available on google code very soon.



This is how we do it

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About Sir Morris

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Loves: Old computers, Old Techno, Old ladies. Cake.
Hates: New computers.

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