This little cutie is the dogs dinner pudding.
I've wired and programmed the controller to assert /BUSRQ, wait for /BUSAK and then have its wicked wicked way with the address, data and /WR lines. Thus effecting some access to memory directly for the uC.
It's not enough unfortunately. I'd forgotten that my internal 32K expansion requires /MREQ to be asserted in order to enable the memory decoder. Which would explain why it doesn't work :)
That and the phantom blips on the /RD line that I'm seeing.
I don't know yet whether this is the ZX81's ULA interfering or some pedigree chum-based effect that would go away if I soldered the thing more carefully..!
I'm glad I've built a prototype - even if it is kind of awful.
I'm off to do some more soldering and a bit of firmware tweaking. Be right back.