Sorted by Squirrels.

Sunday, 14 February 2010

Laid out cold

Here is the manually routed board according to the schematic posted last week.

I've learned a lot in the past few weeks. This layout is the result of having the patience to rip it up and start again. Multiple times. I think this is the 4th iteration so far.

I've broken a few rules along the way, I'm sure, but having looked at the Gerber files in a suitable viewer I think, at least electrically, it might work. When I say work I mean not go on fire. There are no bits overlapping when they shouldn't, no vias encroaching uncomfortably on one another's personal space, and no wires with insufficient clearance.

Having two layers to work on at board-house resolution makes things significantly easier than working at home-brew resolution on single-side designs. Sticking to a few rules which at first seemed punitive and arbitrary has produced a good result. One layer has tracks running horizontally, the other has them vertical. It's hard to describe how this makes things easier but once you start routing it surely does. Some board houses restrict the number of vias you can use, but the one I intend to use has no limit.

I find this activity strangely relaxing. If I knew what a zen-like state was then I think this may approach that. It's rare these days that I get into any kind of zone but taking time out to sit with Eagle for an hour gets me really close.

I finished routing this board despite the fact that I decided to use a different IO expander halfway through due to the fact that:
  • MAX6956 are nearly £10 each to buy...
  • ...when you can actually source them from somewhere.
The MAX has some nice features, not merely the fact that the IO pins line up reasonably neatly with the address lines on the RAM chip. And the fact I've used it before helps too.

I have aligned myself with the Microchip MCP23x17. It's a 16 port expander with either I2C or SPI interfaces. If the SPI version can live peacefully with the MMC interface then I'll choose that - it can be driven faster than the I2C version. There will be times when I'll be reading from MMC and simultaneously driving address lines via the expander. The MMC transfers have to happen in a stream and unless I can cache an entire sector's worth of data in one go then the actions will have to be interleaved. If that's not possible then I'll be looking out for a bit-banged I2C implementation. The I2C and SPI pins and registers are shared on the PIC.

Of course I'll have to try all this out before I commit to FR4. This is the dogs-dinner prototype.

There's not going to be any MMC on there for the moment - the idea is that I'll be using the board to try some elementary DMA by driving the address and data lines on the ZX81. Once I get that working I'll turn my attention to trying simultaneous expander and card access. That can be done on a breadboard though.

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