Long-time readers may remember this board from a few years ago now. It's a complicated little thing, with lots of chips and passives and switches and chips and passives and things. It was a pain to make and to top it all the failure rate was in the high 70%.
There were a number of factors that contributed to this situation and I dare say that I could probably get it working now that I've had some support and debugging help from a friend and fellow enthusiast - Bas at BetaGamma.
The main issue with the board was that the ROM images needed to be stepped through one-at-a-time by pressing the button on the front. It was a chore and the reset method I devised was at best unreliable.
What I really wanted was a menu-driven design which was simpler. So I came up with this.
Simple, eh!
Gone was the PIC microcontroller and its supporting hardware. Added was my CPLD of choice, a Xilinx XC9500XL series chip. 5V tolerant, and in my experience utterly bomb-proof.
The M5's cartridge slot contains a few signals which are very useful - IOWRITE and EXTIOB. The former is what you'd probably guess - asserted when an IO write is in progress by the Z80. The latter is a signal originating in the M5's memory controller custom chip, and is asserted when an IO access is made to a port in the range $70-$7f. Under normal circumstances nothing in the system writes to this IO port.
My plan was to watch for writes to one of the $7x ports and capture the data bus content. This would be used as a base page number for selecting any one of the 64 8K pages of rom in the multicart's EEPROM. Most of the M5's carts are 8k, with the exception of BASICs F & G, and FALC - the M5's spreadsheet.
The M5 has 3 ROM select lines on the cartridge slot. ROM1, ROM2 and EXT-ROM.
ROM1 selects 8k in the region $2000-$4000
ROM2 selects 8k in the region $4000-$6000
EXT-ROM selects 4K in the region $6000-$7000
The CPLD outputs 6 address lines used as bank selection on the EEPROM. The bank number output is a sum of the base bank number set by the Z80, and a 2 bit number formed by ROM2 and EXT-ROM being bit 0 and bit 1 respectively.
EXT-ROM selects 4K in the region $6000-$7000
The CPLD outputs 6 address lines used as bank selection on the EEPROM. The bank number output is a sum of the base bank number set by the Z80, and a 2 bit number formed by ROM2 and EXT-ROM being bit 0 and bit 1 respectively.
With this logic in place and a suitable menu program written and debugged using MESS, I finally had the multicart working that I'd originally imagined.
A fairly simple job of re-working the original schematic and board in EAGLE, another simple job of uploading the design to my favourite short-run fab-house and a final simple job of waiting for 2 weeks and here is the result:
Perfect. Purple.
I just need to sort out a manufacturer for a mid size run of boards then I'll be selling these.
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