I used to think that real fun could never be anything other than corporeal.
That just goes to show. This is the most fun that I've had in a while :)
It's the V2 incarnation (can that be right? There's no meat here..!) of the PL8 MMC interface.
Here she is, in full component-side glory.
The TTL is a simple read/write decoder. The port onto which this fits provides rough address decoding. I wish it would shave. I hate the chafing.
But I do so love the wiring.
It's a PIC - one of those manly sorts with the parallel slave port. I know it's terribly incorrect to use the word slave - oops I used it again! sorry! but that's just what it is. So the parallel slave port behaves like a chunk of selection logic and wakes the PIC when a read or write occurs. There are /RD and /WR lines. The microcode on the PIC latches data ready to be presented on a port when the /RD line is asserted. No delay, it behaves just as a latch would. Similarly asserting the /WR line will latch the values present on the data bus to a register. Interrupts ensure that these events are recognisable and the remainder of the uC code is shuffling data to and fro.
The performance of this type of interface is already documented in another post <>
Needless to say schematics and code, both micro and 6502, are available if you'd like them.